The semiconductor industry has experienced exponential growth and has progressed in pursuit of higher device density and performance as well as lower costs. However, typical semiconductor devices face higher obstacles due to physical constraints. Accordingly, a wide variety approaches of fabrication processes for scaling down of semiconductor device have been developed.
A typical semiconductor device includes stacked components, such as an active feature including a gate layer, a gate dielectric layer and diffusion regions of source and drain regions, a capping layer, a barrier layer and so on. The fabrication of the semiconductors devices is focusing on the scaling down of dimension and arrangement of these components. For example, shorting the gate length or the distance between the gate stacks may result in various issues in the fabrication of the semiconductor device.